Even and Odd Parity Generator and Checker using the Reversible logic gates

Abstract
Digital data transmission is the mostly used in the communication. The data transmission from source to destination should be without loss of information. This is made possible by using the method of parity generator and parity checker. The parity checker and the parity generator are of two types they are even parity generator and parity checker, odd parity generator and checker. Reversible logic gates compremises various parameters in the data transmission. There are various reversible logic gates to meet the needs of the parity generator and parity checker. Reversible gates probably reduce the number of gates utilised in the conventional method. The Parity generator and the parity ckecker is effective method to find the error in the destination end. The reversible logic gate called Feynman gate is used in the process which make the data transmissionmuch more effective with no data loss and is simulated using the simulator ’Modelsim’.
Index Terms:Parity generator, parity checker, Reverversible logic, Feynman gate
I.Introduction
THE parity generator is the method to chek the error present while transmitting data from the transmitter node to the receiver node. Parity generator is of two types they are odd parity generator and the even parity generator. The reversible logic gates are used in the generation of the parity generator and for the parity checker. This is done using the reversible logic gates since the reversible logic gates are non- information loss gates. This parity generating technique is the most efficient technique and is one of the most widely used in the error detection techniques for the data transmission. This generation and the checking of the parity of the bits are performed by the method of the reversible logic gate makes the data transmission much easier than the conventional methods. This use of the reversible logic gates reduces the loss of information, delay and the number of gates used. Reversible logic enables the circuit to perform the retival of the information easily by using the garbage values in the reversible gates.
REVERSIBLE LOGIC:
The reversible logic has one to one mapping between the input and the output vectors. The reversible gates do not loose any information and the input and the output are uniquely retrievable from each other. The reconstruction of the input data is made possible from the output and the garbage vectors at output state. The reversible logic gate effectively reduces the heat dissipation and hence the loss of information is reduced and thereby allows higher densities and higher speed. These gates reduce the complexity of implementation and works in a single clock pulse. The reversible logic Gates have zero fan-out and hence the power dissipation is also zero [1]. The reversible logic has garbage values along with the output terms. The relation between the input, output and the garbage value is as below [2] Input + Constant Input = Output + Garbage Quantum cost, garbage, constant input, delay are the main parameters to be discussed on the reversible logic. Delay calculation is an essential feature of every circuit to manipulate the efficiency. It is denoted by Δ. Quantum cost of a circuit is mainly based on the number of quantum gates present in the circuit.The calculation of the Quantum cost is done by using the gate whose quantum cost is known and finally adding up all the quantum cost of the gates present in the circuit [3]. Each and every gate produces the output which is not used for the further synthesis and those left out outputs are called the ‘garbage’. Although the garbage values are not used for the further synthesis they are essential to achieve the reversibility. The constant inputs are the 0’s and 1’s. The constant input terms are also called as ancilla input bit [4].